IR–S/PDIF Receiver

Schematic Diagrams      Comments Off on IR–S/PDIF Receiver

This simple circuit
proves to achieve surprisingly good results when used with the IR–S/PDIF
transmitter described elsewhere in this site. The IR receiver consists
of nothing more than a photodiode, a FET and three inverter gates used as amplifier. The FET
is used as an input amplifier and filter, due to its low parasitic
capacitance. This allows R1 to have a relatively high resistance, which
increases the sensitivity of the receiver. The bandwidth is primarily
determined by photo-diode D1, and with a value of 2k2 for R1, it is
always greater than 20 MHz. The operating current of the FET
is intentionally set rather high (around 10 mA) using R2, which also
serves to ensure adequate bandwidth. The voltage across R2 is
approximately 0.28–0.29 V.

The combination of L1 and R3 forms a high-pass filter that allows
signals above 1 MHz to pass. L1 is a standard noise-suppression choke.
From this filter, the signal is fed to two inverters configured as
amplifiers. The third and final inverter (IC1c) generates a logic-level
signal. This 74HCU04 provides so much gain that there is a large risk of
oscillation, particularly when the final stage is loaded with a 75-Ω
coaxial cable. In case of problems (which will depend heavily on the
construction), it may be beneficial to add a separate, decoupled buffer
stage for the output, which will also allow the proper output impedance
(75 Ω) to be maintained in order to prevent any reflections.

When building the circuit, make sure that the currents from IC1 do
not flow through the ground path for T1. If necessary, use two separate
ground planes and local decoupling. Furthermore, the circuit must be
regarded as a high-frequency design, so it’s a good idea to provide the
best possible screening between the input and the output. With the
component values shown in the schematic, the range is around 1.2 metres
without anything extra, which is not especially large. However, the
range can easily be extended by using a small positive lens (as is
commonly done with standard IRDA modules). In
our experiments, we used an inexpensive magnifying glass, and once we
got the photodiode positioned at the focus after a bit of adjustment.

IR–S/PDIF Receiver Circuit

IR–S/PDIF Receiver Circuit Diagram

We were able to achieve a range of 9 metres using the same
transmitter (with a sampling frequency of 44.1 kHz). This does require
the transmitter and receiver to be physically well aligned to each
other. As you can see, a bit of experimenting certainly pays off here!
It may also be possible to try other types of photodiode. The HDSL-5420 indicated in the schematic has a dome lens, but there is a similar model with a flat-top case (HDSL-5400).
It has an acceptance angle of 110°, and with the same level of
illumination, it generates nearly four times as much current.

The current consumption of the circuit is 43 mA with no signal and
approximately 26 mA with a signal (fs = 44.1 kHz) That is rather high
for battery operation, but it can handled quite readily using a pair of
rechargeable NiMH cells. Incidentally, the circuit will also work at 4.5
V and even 3 V. If a logic-level output is needed, C3 at the output can
be replaced by a jumper. Finally, there is one other thing worth
mentioning. With the HSDL-5400 that we had to
play with, the cathode marking (a dark-blue line on the side below one
lead) was on the wrong side (!). So if you want to be sure that the
diode is fitted properly, it’s a good idea to measure the DC voltage
across R1, which should be practically zero.
Author: T. Giesberts
Copyright: Elektor Electronics